Matheus Cavalcante
Matheus Cavalcante
Well actually the CI is failing on `vsadd` with an Ara configuration which has two lanes.. That is something we should investigate
> Hey @hossein1387 > > As our changes are based of this PR, should we add our changes to this PR or create a new PR (Because there are a...
@mp-17 Can we merge this? I guess it is more of a question of, is this the configuration you used for ASAP?
I started handling this issue in #75.
Can you put the addition of extra kernels as another issue?
Hi @fantasysee, Nothing prevents the implementation of Ara on an FPGA. It is just that the main developers of this project, both me and @mp-17, are working mainly on the...
Currently not. @mp-17 is working on this on #74, but that PR is still experimental. We might be able to merge that into `main` in the next weeks.
Sorry, I misread, I thought you were asking about `gather`, not `rgather` instructions. Regardless, Matteo's ideas on #74 can be used to implement the `vrgather` instruction as well, which is...
Delaying the merge until the backend issues with the divider are solved.
Any chance we can replace FPNew's divider with the new divider everyone is talking about? :smirk: