Hossein Askari

Any plan on when this PR will be merged?

> Hello Hossein, thank you for the PR! I have still not checked precisely the assignments within the `simd_alu` in terms of math correctness, but I started a review process...

> Hey @hossein1387 , @suehtamacv We have been working on fixing the RTL failures of `vasub`, `vasubu` and `vssub` vfixed-point instructions, fixing CI check failures of `vsadd`, `vsaddu` and `vssub`...

> Hey @hossein1387 > > As our changes are based of this PR, should we add our changes to this PR or create a new PR (Because there are a...

@Jett-tu You can follow up on this PR https://github.com/pulp-platform/ara/pull/146

> @victoryang00 I installed `riscv-gnu-toolchain` using ` brew reinstall --build-from-source riscv-gnu-toolchain` and I was hoping to be able to compile for a vector machine. However, It seems the command above...

Thanks for your answer, Is there any homebrew tap that I can use? I tried to compile LLVM with vector extension using instructions provided in Ara: https://github.com/pulp-platform/ara it worked perfectly...

Thanks again for your reply. Here is the error log when I try to compile `llvm-rt`: [error_llvm_rt.log](https://github.com/riscv-software-src/homebrew-riscv/files/8020378/error_llvm_rt.log) Keep in mind that r Ara is a 64-bit Vector Unit, compatible with...

Hi @poldni you first need to add Ara to Fusesoc. You can do so by: ``` cd [PATH_TO_ARA_REPO] fusesoc library add ara . ``` Then you can try running FPGA...

Ok so there are two issues. One with Fusesoc and one with `common_cells`. For Fusesoc, pease follow this PR and Issue I raised on the Fusesoc repository: https://github.com/olofk/fusesoc/issues/580 Basically, we...