Zalman Stern

Analog synths work on control voltage (CV), which will often be paired with a gate signal to allow keyboard control. Plenty of detail here: https://en.wikipedia.org/wiki/CV/gate . Plug-in APIs, such as...

Andrew and I agreed that the entire thing being checked here is probably no longer needed. Planning to test that hypothesis and do it on this PR if it works.

Re: "specify a microarchitecture" there are two uses for such. The current ```Target``` design would use a chip name to expand to a set of individually controllable instruction set features....

Generally there would be a mechanism that expands the name to the list of features for names that are known. For backends that do not support enumerating names and their...

There are backends that are not LLVM based already and they likely have similar issues, though it is possible we'll want to use an LLVM API to ensure we cover...

The issue with having multiple representations in Target for the same set of flags is that comparing them no longer works. We depend on this for build system logic among...

Another thought I had here is we could lower the runtime target checks for instruction set features to the actual numbers/masks returned by the cpuid (or equivalent) instruction. This would...

I'll start looking at this shortly. Have you looked at the https://github.com/halide/Halide/tree/fixed_length_vectors branch? I've mostly been looking at RISC V recently, but the branch does support SVE2 with longer than...

Does this PR allow generating code for an asserted fixed hardware vscale?

> > Have you looked at the https://github.com/halide/Halide/tree/fixed_length_vectors branch? > > Thank you @zvookin. No, for the commits after branch name was changed long ago and yes before that. I'll...