tjaychen

[uart] Convert edge based interrupt to level

10

Split out from #15378: - [ ] tx_watermark - [ ] rx_watermark - [ ] tx_empty should remain event-type

[tlul] tlul_sram_byte data integrity check

16

When a byte write is issued to memory, `tlul_sram_byte` is responsible for doing a read first to generate the new word-wise integrity. However, the read data integrity is not checked...

[cdc] clean-up cdc constraints

9

with #13016. cdc constraints are now being introduced to the flow. These constraints are separate from sdc constraints and need their own mechanism of sourcing (right now I am temporarily...

[sw] Flash secure erase and guidance

6

### Description There may be a software need to implement a "secure" erase. This is an erase that is multi-pass where after the data is erased a random value is...