sylefeb
Yes, I unfortunately did not find the time to work more it. Contribs welcome!
This implies creating temporary register.
No longer necessary, with the introduction of __signed and __unsigned
Ok, we still want to case to different bit-widths, when the type checker is in place.
For now it is technically difficult to allow passing selection from table, bitfields, or constants (more generally arbitrary expressions). The current status is: - Dot access has been added, e.g....
At long last, this issue is fixed in a recent commit (as part of some larger ongoing changes).
Thanks! This will be the focus of the next changes I think, and should resolve a couple other open issues in passing (e.g. #49, #126). I'll make sure not to...
One difficulty with this idea, is how it interacts with interfaces. Right now, an interface can specify how the user should deal with its output wrt. the inputs. For instance...
Hi - indeed, resets are currently generated as synchronous; but it would be possible to add an algorithm modifier (e.g. similar to `autorun` see [modifiers]( https://github.com/sylefeb/Silice/blob/master/learn-silice/Documentation.md#modifiers) ) to request an...
- [fixed] input/output cannot use 'wire'?