Roman Isaikin
Roman Isaikin
This will allow to safely get priority of a current task and implement various loggers with lockless queues for each priority level.
Wouldn't it be great to automatically create a proper linker configuration based on the selected chip? It seems that this information can be easily pulled from yaml files in `probe-rs/targets/`....
Closes https://github.com/stm32-rs/stm32l4xx-hal/issues/223
FDCAN1_INTR0_IT and FDCAN1_INTR1_IT are swapped (seems to be an error from the ST), what would be the best way to fix this?
Simply no output, maybe some one might have an idea why could it be. Another piece of the puzzle is this library - https://github.com/wez/jlink_rtt which works just fine. I even...
It seems the if you call 'rcc.freeze(rcc::Config::msi(MSIRange::Range5));' and then enable Adc it will just freeze, because there is no clock to it (default is HSI16) and no way to change...