Roman Isaikin

Results 18 comments of Roman Isaikin

Can you take a look at it? Will be testing it more, but it seems to be working again.

Needed the same thing, came up with this, not yet tested though: https://github.com/romixlab/stm32l4xx-hal/commit/1cf33325a04bf5c40eb4cb140723e6a1605bc6c6

This works: https://github.com/romixlab/stm32l4xx-hal/commit/3a1b7be9c656dedcbdd02c85ddd50d927010a782

Finally got some time to work on this, PR is open.

Tried it on STM32F051 (thumbv6m) with alloc-cortex-m crate. Unfortunately something in `capnp::private::layout::wire_helpers::allocate ()` causes a HardFault to occur on `str r1, [r5, #0]` instruction, while r1 = 0. Btw size...

Would be interesting to check again!

Some way of getting values out of yaml files will also be required, maybe it's easier to create a cargo tool tailored specifically for that task...

Great! That can be used for improvements. As for the memory size part, probably some scripting functionality from cargo-generate will be required. I wonder what would be better, add scripting...

Hi, I only investigated the possibility of implementing logging functionality through separate queues for each priority level. Didn't had time to implement it yet. There was some discussions in defmt,...

+1 This would be a great feature to have. Simplest case: different revisions of the board might require some pin shuffling, so interrupt handlers change.