qgzln

Results 9 issues of qgzln

I am FPGA developer,I often use some ip core,so,When does spinal.sim support vcs or modelsim

In the Spinal lib,I find there is axi4 crossbar,axi4 decode ,Will there be axilite4 crossbar and axilite4decode in lib in the future?

I find that the plug has a feature: Go to definition for variable,is there a feature that Go to definition for module?

enhancement
language-server

When I use vscode to open a Verilog file and instantiate it。I plan to Paste it into a new file,then double-click to create a new file like ![image](https://user-images.githubusercontent.com/47837258/119597494-b7aa9d00-be13-11eb-8d89-edf9c02faac1.png) with the...

bug
global

**Describe the bug**A clear and concise description of what the bug is. I install python and other lib in Anconda ,but it does not work in windows ![image](https://user-images.githubusercontent.com/47837258/143816936-b50ae2d6-ebee-4d29-9447-34a1c71eb182.png) ![image](https://user-images.githubusercontent.com/47837258/143816743-9a662239-2d20-4116-a9e9-4949f4ec82e6.png) I...

bug
documentation
global

I use vscode under win10, does the plug-in support win10

documentation

Is there AXI4-STREAM in cocotb-bus?