Thach Nguyen

Thank you Jan! This is a great response. I really appreciate you. I will check my hardware design and may try the new SweRV core version

I'm sorry for not being clear with my question. I'm new to ubuntu and riscv. My question is when we type ./configure [option]. What options can I put there if...

> Do you need to build it yourself? > Could you use the xPack Project binary builds from @ilg-ul? > If you really do need to build it yourself then...

> RISC-V support is always included. You don't need to pass any special options to configure to include it. Thanks! that was exactly what I did. I just typed ./configure...

@aprnath Thank you! This is a huge help for me. Can you point me to code sections that control/command "flushing the entire pipeline" ? Also, where in the design are...

@aprnath Thank you! Can you point me to where the pipeline registers are instantiated/created? Again, I appreciate your help

@aprnath Thank you! I will take a look at the PRM

@aprnath I just have one more question for this post ``` rvdffe #(32) csr_rs1_ff (.*, .en(i0_e1_data_en), .din(csr_rs1_in_d[31:0]), .dout(exu_csr_rs1_e1[31:0])); ``` Is this an example of a pipeline register? Thank you

> Did you try compiling a hello world program with your riscv64 compiler to verify that it works? > > Try looking at the actual error in the riscv-pk/build/config.log file....

> This question has been asked a few times on sw-dev. though these mostly talk about the software side, i.e. updating tools to support the new instruction. > [https://groups.google.com/a/groups.riscv.org/forum/#!searchin/sw-dev/adding$20|sort:date/sw-dev/CF82G6YjDak/HY7uZhLCAQAJ](https://groups.google.com/a/groups.riscv.org/forum/#!searchin/sw-dev/adding$20%7Csort:date/sw-dev/CF82G6YjDak/HY7uZhLCAQAJ) >...