Krzysztof Boroński

Results 10 comments of Krzysztof Boroński

Marking as ready for review, as for now the most effective approach is probably to keep a separate copy of Tcl scripts to use with legacy tooling (arch-defs), until we...

I'm closing this issue as there's no activity and we will prioritize changes that remove complexity from the existing solution over changes that add new features, yet this issue contains...

`stdm` does not even work with current builds, because the string used for numbering them represents numbers greater than what integer representation in Python can handle which causes it to...

Okay, so there's a couple of things here: First, I don't think you should depend on directly using Tcl scripts that are part of f4pga. Those scripts can (and will)...

This is **over 78k lines of code**, which is way more than all the code we have here at the moment. I'm all for unification of tools used in our...

@suksham11 Hi, thanks for your interest in this project. There are several sources from which f4pga takes paths. 1) Platform definitions (`f4pga/flows/platforms.yml`) - those will be values (dependencies cannot be...

I'm afraid that solving the underlying issue might require reworking the way references are being handled in AST (unless I missed something and it's actually possible to hold a reference...

Ok, I see what's happening here. `initial` block has a static lifetime which results in the dynscope object getting moved into vlSelf class. However, not everything gets moved like that...

Looks like there's an issue that's related to this PR: https://github.com/chipsalliance/fpga-interchange-schema/issues/44

@clavin-xlnx I moved the BEL locations to DeviceResources. I made an extra structure called `PrimLibsExtra` that should hold any data that relates to primitive libraries that can't be expressed within...