Kasture, Deeksha
Kasture, Deeksha
When running benchdnn tests for convolution with the following command on aarch64: `./benchdnn --conv --dt=f32 --dir=FWD_D --batch=inputs/conv/test_conv_all` there are certain cases with `--check-ref-impl=true` that are failing because they are not...
# Description This commit enables BRGEMM general and 1x1 forward convolution for the ARM SVE ISA. **Major code changes:** Added BRGEMM convolution files in src/aarch64 to support general and 1x1...
# Description This PR extends the BRGEMM (Batch-Reduce General Matrix Multiplication) kernel to support additional INT8 data types, enabling broader applicability for low-precision computations, particularly in deep learning workloads. Supported...
# Summary Following test give accuracy error for u8:s8:f32 ``` ./benchdnn --conv --dt=u8:s8:f32 --skip-impl=ref,x64:gemm mb1ic64ih1iw33oc1oh1ow33kh1kw24ph0pw23n"l_pad_exceeds_ow_block" ``` The failure occurs because the output is compared against sve_jit_convolution, which itself is producing...