kapoor7997

Results 18 comments of kapoor7997

FPGA Miner Project update and how to run it on a board(xilinx ZCU102 Development board) that is not in the tested projects directory

Hi [penguin359](https://github.com/penguin359), Thank you for your reply. I appreciate that a lot. I will be working on hardware today. but does this code need an **application/host** side to trigger the...

FPGA Miner Project update and how to run it on a board(xilinx ZCU102 Development board) that is not in the tested projects directory

Hi [penguin359](https://github.com/penguin359), Thank you so much for your reply again. I really appreciate that. The probe that talks over jtag in Altera. Is that using serial port(UART or usb-uart) for...

FPGA Miner Project update and how to run it on a board(xilinx ZCU102 Development board) that is not in the tested projects directory

Hello [penguin359](https://github.com/penguin359), I went over the code to see the flow of the code a little bit and the top level entity is only taking clk and rx as input...

FPGA Miner Project update and how to run it on a board(xilinx ZCU102 Development board) that is not in the tested projects directory

Hi [penguin359](https://github.com/penguin359), My board is ZCU102 and it has USB-UART chip and also USB-JTAG. Once again I really appreciate your reply. I went over the code and the top level...

Can we run this code on zcu102?

Hi [chunsj](https://github.com/chunsj), Thanks for replying on my question. I have ZCU102 board with 8 Gb ram. The dag size today is 4.8438. But you mentioned that ram needs to be...

Can we run this code on zcu102?

Hi [chunsj](https://github.com/chunsj), I am trying to get it to work on the ZCu102 board. I have **vitis and vivado 2021.2** version installed. I **modified build.sh** to replace the **DEVICE=u55n_gen3x4** to...

Can we run this code on zcu102?

Hi [chunsj](https://github.com/chunsj), Thank you for your reply. I do have some experience on petalinux and xilinx tools. So this repo doesnt have any hdl code. Which means I will create...

Can we run this code on zcu102?

Hi [chunsj](https://github.com/chunsj), We understand the idea that we need to generate vitis acceleration platform. The outcome of vitis acceleration platform is .xpfm file. Just trying to understand where in this...

Can we run this code on zcu102?

Hi [sven2314](https://github.com/sven2314), [chunsj](https://github.com/chunsj), Thank you for replying to this thread. I understand that I have to create a vitis embedded platform, but my query is about this specific code. The...

Am I really mining?

Hi [penguin359](https://github.com/penguin359), I followed your advice and ran the LED's and also got the serial working on the ZCU102 board. I then also got the project **VHDL_Xilinx_Port** working on the...