intel-jisheng1

Results 1 issues of intel-jisheng1

Add support for the FPGA simulator to run the code samples for max_interleaving, loop_ivdep, loop_unroll Uses ext::intel::fpga_simulator_selector class to choose the simulator. # Existing Sample Changes DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/ DirectProgramming/DPC++FPGA/Tutorials/Features/loop_ivdep/ DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/ ##...