Johannes de Fine Licht

Results 19 issues of Johannes de Fine Licht

The OpenCL header needs thorough doxygen documentation of all classes and member functions to make their semantics more clear.

enhancement

Christian Lutzweiler has suggested making wrapper types and utility functions supporting custom bitwidths. Features could include: - Portable custom bitwidth type (Xilinx uses `ap_uint`, OpenCL doesn't support it, i++ might...

enhancement

Following the [macOS instructions](https://github.com/etesync/etesync-dav/wiki/MacOS-instructions), I'm trying to add my CalDAV user, but getting "Unable to verify account name or password". I'm running `etesync-dav` 0.31.2. Interestingly, adding the CardDAV using the...

Can't say with certainty that this is Catalina-related, but I haven't seen the problem before. The `etesync-dav` process is running on my machine as usual, but when I open my...

It is sometimes useful to convert between one size vector and another size vector in FPGA codes, for example when converting from 512-bit reads from DRAM to some smaller vector...

Xilinx kernels allow nesting processing elements in nested dataflow sections, which has recently been added to hlslib as a supported feature. If we support this, we can benefit from nested...

enhancement
codegen
fpga

We currently emit code to read or write a variable in many different places, across many different codegens. In order to promote reuse of code across codegens, I propose that...

enhancement
codegen

Currently `defined_vars.add` is called "extra" next to the code actually emitting the definition code. Instead, let `defined_vars.add` (should be renamed/possibly refactored) actually return the string if it can be successfully...

enhancement
codegen

The current method is pretty dirty. There's a native way to create systolic arrays described in the documentation: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf#_OPENTOPIC_TOC_PROCESSING_d116e44989 We should update the codegen to use this.

codegen
fpga

**Is your feature request related to a problem? Please describe.** Currently `SDFG.name` is implemented as a Python property, with an advanced setter and validation. This requires it to be handled...

core