Canberk Topal

[dv,pmp] Timeouts because of infinite loops in the generated program

2

@marnovandermaas and I talked about this internally so I'm assigning him because of that. Please feel free to unassign yourself if you feel like it :) In the case of...

Ibex does not reflect instruction memory changes to ICache

2

If ICache is enabled and a write to a cached instruction memory (which we are allowed to do) occurred, Ibex does not let ICache know such a store happened. As...

[dv] Timeouts across several passing tests

1

## Observed Behavior List of timed out tests that are otherwise passing in the daily regression from 04/07/22: - riscv_debug_ebreakmu_test (seed 22641) - riscv_single_interrupt_test (seed 22641) - riscv_nested_interrupt_test (seed 22638)...

[dv] Integrity error generation in memory busses

14

1st commit changes the old `memory_error_seq` so that it uses the new sequence library. 2nd commit is a bug-fix guaranteeing not injecting an error while handshaking. 3rd commit allows us...