Christian Klarhorst

@enjoy-digital It is fine for me if you don't want to merge this. The user base might be very small, but I found it helpful.

integration/soc Add accessible_region to add_memory_buses

2

Commit Message: Enables CPUs to know which memory addresses are accessible via the connected memory_bus. Explanation: Current situation around the NaxRiscv: - `litex_sim --cpu-type naxriscv` working - `litex_sim --cpu-type naxriscv...

Snakemake throws a PeriodicWildcardError for some long filenames

2

**Snakemake version**: 7.8.5 **Describe the bug**: Snakemake throws a PeriodicWildcardError for certain filenames that I think are valid. This only happens for long filenames (>20 maybe?). **Logs** ``` ~/git/snakemake_test$ snakemake...

Axi_lite_to_wishbone: Reduce latency, make latency configurable

12

- First commit reduces the latency for the request handover by 1 - Second commit reduces the latency for the rw data handover by 1 Benchmark with NaxRiscv (this uses...

I did not find a way in the build process to automatically add additional commands & special init code to the bios. Example Workflow: `pip install pythondata-module-can` A target with:...

Hi all, I'm trying to get litepcie to work on a custom board with a kintex. While looking at the vivado output, I noticed many inter clock paths failing. I...

WIP: Serwb improvements

4

I decided to make this PR bigger: My open todos: - [x] Wait for PR #14 - [x] s7serdes: Add Virtex7 support - [x] s7serdes: Allow different serdes data_width options...

Setting uart_name to 'bridge' results in linker errors

21

I would like to use the uart bridge (for openocd debugging and for litescope). So I changed my target file (atlys/base) and added: ``` [...] def __init__(self, platform, **kwargs): kwargs['uart_name']='bridge'...

Add a new debug target for the atlys board (see #481)

7

Any ideas on what I should improve? Also, please be aware that #460 is not fixed yet. So you need to manually change `third_party/litex/build/xilinx/ise.py:168` ("keep", "true") -> ("keep","soft") to build...

Make gateware fails for possible all ISE based Boards

4

Using the latest master branch it doesn't seem to be possible to build the gateware for any ISE based Board. The process fails with the error message: ```Writing file top_map.ngm......