Kefa Chen

Support exporting packed struct / union in verilator

2

This PR is to solve [issue 860](https://github.com/verilator/verilator/issues/860). `bitHelper` is a `memcpy` at bit level. It copies `width` bits from `inLsb` of a input array to `outLsb` of a output array....

Following axi id types exist in file `ara_soc.sv`: ```systemverilog localparam type axi_id_t = logic [AxiIdWidth-1:0] localparam NrAXIMasters = 1; localparam AxiSocIdWidth = AxiIdWidth - $clog2(NrAXIMasters); localparam AxiCoreIdWidth = AxiSocIdWidth -...

I'm exploring auto-vectorization performance of vegen but find that there is no benchmark in the `test` dir described in the paper section 7. Could you provide benchmarks used in the...

### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description `stall_instr_fetch` signal in `core/id_stage.sv` will not be driven if...

Inconsistent grant behavior of rr_arb_tree module between NumIn == 1 and NumIn > 1

1

If we set ` parameter bit AxiVldRdy = 1'b0` with `NumIn > 1` ```systemverilog assign gnt_o[l*2] = gnt_nodes[Idx0] & (AxiVldRdy | req_d[l*2]) & ~sel; assign gnt_o[l*2+1] = gnt_nodes[Idx0] & (AxiVldRdy...

[Equation 14.36](https://www.pbr-book.org/4ed/Light_Transport_II_Volume_Rendering/Scattering_from_Layered_Materials#eq:pdf-estimate-sum) Gives mathematical expression of pdf value of layered material given $`w_i`$, $`w_o`$. But I can't understand why using brdf $p_r^+$ or btdf $p_t^+$ in equation, instead of using...