Andy Wright comments

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                                            Andy Wright

Issues with defined macros in bsvpreprocessor.py

It wasn't in BSVFILES. Actually the file causing the problem was just some file in --bsvpath that wasn't being used anywhere so I deleted it. I do have some other...

sifive-serial: register uart port as console before adding it

I just came across this problem too, and fixed it in an equivalent way. I am using a modified version of spike (custom simifc_t class without htif). I have a...

Internal signals don't work after Verilator update

It looks like this is the Verilator commit that introduced this bug: https://github.com/verilator/verilator/commit/21a380def0803789a92e00aa3f37a43fd4d804a2 Until pyverilator is updated to support this new format, you can revert to Verilator v4.020 or earlier...

Columns in different summary tables with same name affect each other

Thanks for the explanation. That behavior makes sense. Are you suggesting that adding `Foo` to summary table `A` adds it as a hidden column to summary table `B`? I think...