Marius Meyer
Marius Meyer
Hi everyone, I tried to synthesize and execute an OpenCL design that makes use of [pipes](https://docs.xilinx.com/r/en-US/ug1393-vitis-application-acceleration/Reducing-Kernel-to-Kernel-Communication-Latency-in-OpenCL-Kernels) with Vitis 2020.2 and XRT 2.9 for the platform `xilinx_u280_xdma_201920_3`. Execution of the kernels...
Hey, The Readme states that this network stack can also be used in OpenCL. I would really like to give it a shot. Unfortunately, the repository seems not to contain...
This may not be directly related to ACCL itself but I found this old script in the test directory which seems like it was used to update the ACCL firmware...
Repeated calls of send/recv of the following form get stuck after several iterations on two ranks: ```C++ for (int i=0;i
The ACCL XRT test suite fails for large counts on the bcast with root 1 tests. ACCL was synthesized with TCP stack and UDP stack from `dev` at 36eebbb. All...
Currently it is not possible to have the same source and destination rank for send/recv. A possible replacement for this call may be a copy from or to stream to...
Currently, we only have a single parameter to specify the source/destination tag of a message and the source/destination stream_id. This means, that tag and stream_id have to match for every...
In the [CCLO description](https://github.com/Xilinx/ACCL/blob/dev/docs/overview.rst#cclo-subsystem), the streaming connections to user kernels are described in the text but not visualized in the figure. Maybe this visualization could then be extended to describe...
Using the XRT driver to create an ACCL buffer for simulation, all create_buffer calls except the one that takes an xrt::bo will create a SimBuffer object that returns a nullptr...
In the XRT driver, the ACCL constructor currently requires the user to give the cclo and control kernel as `xrt::ip` and `xrt::kernel` objects. But in some cases it may be...