Katharina

Hello. We wanted to run sv2v on the CVA6 core and came across the same issue. Commands to reproduce are: ``` git clone https://github.com/openhwgroup/cva6.git cd cva6 git submodule update --init...

Thank you @zachjs for the quick fix! The attribute parsing works fine. There are other errors now when parsing cva6 with the above mentioned commands. The assertions at the end...

Hello. We could also need this feature for debugging purposes. We use sv2v in order to get a Verilog version of a design. Then we feed it into our Yosys-based...

Implementing it as an option sounds good. I also have another use case now, where I would need this feature for generating verification code.

No, not for the original spike. The tests ran with with spike cloned from https://github.com/lowRISC/riscv-isa-sim.git (commit 9af9730baf7b956c3072c1b436d867aca5ef8f4c).

I used riscv32-unknown-elf-gcc (g2ee5e430018) 12.2.0

The latest version of spike has no --misaligned argument and the build configuration option --enable-misaligned does not exist in the latest version of spike.

Yes, this exception occurs with the original spike, but not with the lowRISC fork. Would be good to mention in the documentation which version of Spike should be used.

Hello Rasheed, The above example is valid according to IEEE standard 1800-2017, "A.2.6 Function declarations". The code was generated by the sv2v (https://github.com/zachjs/sv2v) tool. Best regards, Katharina

We encountered the same problem when using Verilator provided by apt-get in Ubuntu 20.04.5: Verilator 4.038 2020-07-11 rev v4.036-114-g0cd4a57ad. Fixed the problem by compiling and using Verilator version 4.210