zifeihan comments

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                                            zifeihan

8295261: RISC-V: Support ReductionV instructions for Vector API

/covered

8295261: RISC-V: Support ReductionV instructions for Vector API

/integrate

8317720: RISC-V: Implement Adler32 intrinsic

Hi, I ran the jmh test on the Banana Pi BPI-F3 board (has RVV1.0): Apply this pr and diable UseRVV ``` Benchmark (count) Mode Cnt Score Error Units TestAdler32.testAdler32Update 64...

8317720: RISC-V: Implement Adler32 intrinsic

I also ran the correctness test on the Banana Pi BPI-F3 board (has RVV1.0): Before this patch and disable UseRVV: Test `test/hotspot/jtreg/compiler/intrinsics/zip/TestAdler32.java` is ok Before this patch and enable UseRVV:...

8317720: RISC-V: Implement Adler32 intrinsic

> Hello @zifeihan! Thanks for your efforts on improving this PR. I don't have access (yet) to Banana Pi board, so I can't debug precisely the case you pointed out....

8331341: secondary_super_cache does not scale well: C1 and interpreter

Hi, I ran some jmh tests on the arm64 platform and the performance `SecondarySupersLookup.testPositive` seems to have decreased, is this as expected? before this patch: ``` Benchmark Mode Cnt Score...

8331341: secondary_super_cache does not scale well: C1 and interpreter

@theRealAph Hi, And here is the version for riscv: https://github.com/zifeihan/jdk/commit/2c5296859597f5edc6601a5d1780126ec373d4dc . Do you want to have it in this PR? Or shall I create another one? Thanks. By the way,...