Yuzong Chen
Yuzong Chen
Hi, I am currently using coffe to run automatic sizing for a full adder. I only care about the area and delay trade-off for this subcircuit without considering the global...
Hi, I am currently using COFFE to run simulations for a modified BRAM and I am using many nand gates, nor gates, sense amplifiers and write drivers as in Aman's...
In coffe/fpga.py, line 3593 when calculating and updating the area for wordline drivers. At line 4529, the calculation only considers the areafac which equals to 2**self.row_decoder_bits. However, should this area...
Hi, thank you so much for the amazing paper and repo. I am trying to reproduce the Wikitext and C4 perplexity in the OmniQuant paper. I downloaded the repo and...