Hang Yan

Thank you for your reply! We've tested the old platform before, and it works perfectly with TAPA! But we have to stick on the newest platforms (both U250 and U280)...

Sure, thank you! We will try to find a workaround to deal with that issue.

@vaughnbetz Sure! Will be done within this week :)

Sorry for the late reply due to the massive preparations of going back campus. I have updated the summary and uploaded the final report in last commit. Could you please...

Gotcha! Thanks, Alex and Soheil! I was just trying to make CI happy in the router PR and found this error that I have no idea how to resolve. 😂

#### Expectations: - The "Test" and "Container" CI workflows are skipped as expected, according to https://github.com/verilog-to-routing/vtr-verilog-to-routing/pull/2605/checks. - The Read the Docs are also built successfully, https://vtr-verilog-to-routing--2605.org.readthedocs.build/en/2605/  #### Remaining Issues:...

Thanks for you kind reply and example! It really helps for our development. BTW, is there any chance to use the TAPA-style **reinterpret method** like [`tapa::read_only_mmap(buf).reinterpret()`](https://github.com/UCLA-VAST/tapa/blob/68adeef65523394c1a057f4e35f5e1f68c6edd6c/regression/serpens-16ch/tapa/src/serpens-host.cpp#L198-L201) in fpga-runtime API? If...