Udo Steinberg

That is certainly a long-term goal, but nothing is planned for RISC-V in the near term. There doesn't seem to be any RISC-V hardware that implements the hypervisor extension, or...

NOVA's IPC mechanism implements priority and bandwidth inheritance as described in https://hypervisor.org/ospert2010.pdf. That paper also contains a section called "Multiprocessor Considerations", which explains why the desired properties cannot be implemented...

Maybe you can explain in more detail how you expect inter-core IPC to work, given the following situation: - CPU0: Active thread A with priority 10 - CPU1: Active thread...

> Yes, it's similar to your suggestion. The difference was that NOVA will create all these "core-local" for all CPUs automatically for all servers instead to let each server to...