Thomas Benz

Results 13 issues of Thomas Benz

axi_sim_mem: Add the possibility to emit read and write errors

`axi_demux`: Replace write FIFO (`w_fifo`) with a write credit counter

1 comment

Use `scripts/update_authors` to update author information in the project.

Add a simple synthesizable AXI Lite LFSR

2 comment

Add random user signal generation for llc-partition test

axi_lite_dw_converter: Enable user size pass from AXI converter

Create per-channel user signals

enhancement

vcs-sim: Add scripts to run VCS sims

enhancement

Improve AXI cut/multicut.

Allow per-channel cutting or insertion of spill registers for better control.

enhancement

treewide: Add SpinalHDL USB 1.1 controller

ToDo: * [x] Add missing commits * [x] Rebase after FPGA merge * [x] Clean up existing codebase * [x] Move control to regbus, verify * [x] Verify everything still...