Tarik Graba issues

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                                            Tarik Graba

Modelsim: Handle cSource/cppSource and header files with modelsim

Source files can be compiled by passing them to `vlog`. Header files search path is also passed using the `-I` option. TODO: All incdirs (RTL and DPI) are passed to...

Embed slang-yosys plugin as a SystemVerilog frontend for yosys

Is it possible to embed the slang base frontend for yosys? https://github.com/povik/yosys-slang It has better support for SystemVerilog constructs, which would make v-to-r easier to use with pure SystemVerilog project....