Stefan Lankes
Stefan Lankes
Just minor modifications to improve the readability and to reduce compiler warnings.
with #277 exists already an initial RISC-V support. It must be rebased to the current version of the kernel and extended to a full running RISC-V kernel.
Currently, we enable the enable polling only for PCI device (https://github.com/hermitcore/libhermit-rs/blob/master/src/drivers/net/mod.rs#L57). Is this behavior correct?
As alternative to uhyve, we should als support [Qemu's MicroVM](https://qemu.readthedocs.io/en/latest/system/i386/microvm.html). Currently, it isn't runnable. I think that the initialization of the interrupt controller failed.
We should backport our [prototype](https://www.ssrg.ece.vt.edu/papers/vee20-mpk.pdf) for intra-kernel isolation.
https://github.com/hermitcore/libhermit-rs/blob/b52be1ea6f4a815dc7d32bc054c8cfe70dba0a58/src/arch/x86_64/kernel/virtio.rs#L103-L116 @tlambertz the code assumes contiguous memory. But there is no guarantee. I think that you have to use https://github.com/hermitcore/libhermit-rs/blob/master/src/mm/mod.rs#L239.
Benchmarks show that the time for a thread creation is too high. As workaround we use currently in our demo a thread pool.
Using QEMU 2022.4.19 from choco fails silently: https://github.com/hermitcore/rusty-hermit/runs/7109382481
In this case, we export only data structures (and not ffi functions).
To realize `priority inheritance` in `hermit-sys` an interface to change the thread priority is missing.