Stephen Neuendorffer comments

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                                            Stephen Neuendorffer

Proposal: Remove multi-dimensional memories from core primitives

Makes sense to me. This is one of those things that is likely an important hardware lowering for many platforms.

[RFC] Contributing an ONNX to TOSA legalization pass to onnx-mlir

I'm really excited to see this. This is something that Xilinx/AMD should be able to help build out.

Experiment: coordinate LLVM commits between torch-mlir and onnx-mlir

This is one of the things I've struggled with trying to define a cadence. If the cadence is short (say daily), then you can proceed with a fix-forward approach. Take...

Update LLVM to bc07634b5a762686b818932eb350b4fc84217e67

@wsmoses Do you have any insight into the failures here?- I'm surprised things seem to be quite broken and I'm not sure what I missted.

Update LLVM to bc07634b5a762686b818932eb350b4fc84217e67

@wsmoses thoughts?

mlir_tblgen is broken for cross compile

I've seen things happen like this with toolchain files, where information discovered from the outer build doesn't get passed to the inner build, including the toolchain file. As a result,...

CPP emitted causes Vitis to segfault

It would be good to capture this for the vitis hls folks: if you have the source code and TCL that fails?

Could NOT find LibXAIE (missing: XILINX_XAIE_INCLUDE_DIR XILINX_XAIE_LIBS)

@jackl-xilinx I think this is fixed now, but we don't document the LibXAIE build process. Can you add some notes in GettingStarted.md?

-aie-lower-memcpy generates illegal AIE.mem operation

Indeed, it looks like the pass assumes there is only 1 memcpy

-aie-lower-memcpy generates illegal AIE.mem operation

Your propose code is almost right. dmaStart is an MLIR terminator, so it has to be more like: ``` %2 = AIE.mem(%0) { %15 = AIE.dmaStart(MM2S0, ^bb1, ^bb2) ^bb2: %16...