Sylvain "tnt" Munaut
Sylvain "tnt" Munaut
Mm, yeah, the pinout definitely need some update since there are several boards and several pmods / cable supported and you need to update the `pcf` to suit your exact...
https://www.eevblog.com/forum/projects/where-can-i-get-the-b50610c1kmlg-datasheet/?action=dlattach;attach=902234
In case anyone is still looking for such info : doing a `remove` on the root bridge corresponding to that PCIe slot and then doing a rescan often works better...
Would definitely like to see this done and could contribute to a bounty for it.
So I tried tracing the various state it goes through during several events : Initial configuration ( with PC already booted ) * ltssm=00 (Detect.Quiet) [ initial ] * ltssm=01...
Other interesting result is I tried commenting out https://github.com/enjoy-digital/litepcie/blob/master/litepcie/phy/usppciephy.py#L97 Idea is that I can imagine some of the logic wants to see a clock when reset is asserted. And that...
Closing as I don't think the remaining weirdness is LitePCIe related and the removal of the clock gating on reset fixed most of them.
I would suggest to try https://github.com/no2fpga/no2muacm . Don't clone the repo but rather download the latest release (which is pre-built). It's pretty much meant to look like "a FT232 USB-to-TTL-serial...
ATM I define : ``` CONDA_ENV_PYTHON= IN_CONDA_ENV= ``` and don't include `conda.mk` and this works fine for me.
To test the rebuild I guess you can just do a `touch XXX` on any of the cell .json and check that the corresponding library gets rebuilts (its timestamp should...