Simon Menzel
Results
2
issues of
Simon Menzel
Fix https://github.com/VUnit/vunit/issues/782 as suggested by @LarsAsplund
Enhancement
Simulator support
vivado.py function _read_compile_order() used by add_vivado_ip() fails with assertion when compile_order.txt contains references to files that are not VHDL or Verilog. However, some Vivado IP include .coe or .mif memory...
Enhancement
Simulator support