Simon Waid
Simon Waid
The models for the **npn transistors** are not listed in **all.spice**. I tried to manually add the models by adding the following lines to all.spice: ``` .include "../../libs.ref/sky130_fd_pr/spice/sky130_fd_pr__npn_05v5_W1p00L1p00.model.spice" .include "../../libs.ref/sky130_fd_pr/spice/sky130_fd_pr__npn_05v5_W1p00L2p00.model.spice"...
In magic, when creating a varactor, e.g. of type LVT, 2µm wide, 5µm long the following DRC error is appears: "N-well overalp of varactor poly
When extracting the spice file from the attached [layout](https://github.com/RTimothyEdwards/magic/files/8132251/bug.zip), the bulk in the subcell isource_diffamp is extracted wrongly. The spice file looks as follows: `X0 D2 G2 S2 B2 sky130_fd_pr__nfet_01v8...
I'd like to use rsync to create backups on tape using LTFS (See: [https://github.com/LinearTapeFileSystem/ltfs](https://github.com/LinearTapeFileSystem/ltfs)). I have tried to do so, but performance is unusable low. I attribute this to rsync...
The analog pad (as well as other pads) provided as part of the skywater 130 pdk contains DRC errors Steps to repoduce: - Install magic rev. 8.3.399 - Install the...
Creating a N-Type Varactor with multiple fingers causes the DRC error "N-Well overlap of varactor poly < 0.15um (varac.5)". The error is only visible when descending into the Varactor cell....
When extracting parasitics adding a generic resistors results in a floating node. Please find attached a sample file. [test.zip](https://github.com/RTimothyEdwards/magic/files/11792855/test.zip). The file contains two ports connected via a resistor on metal...
The isolated ESD diodes (idiodevdd_2k, idiodevdd_4k, idiodevss_2k, idiodevss_4k) as documented here: `https://ihp-open-pdk-docs.readthedocs.io/en/latest/verification/lvs/04_07_esd.html` They are missing in the spice library and the ESD pcell. They would be useful for low-leakage, guarded...
In Klayout a sg13_lv_nmos transistor with multiplier 2 and number of gates 2 looks like this: It seems as if the multiplier has no impact on the layout. Further, the...
Loading operating point simulations appears to require considerable time and memory. Attached is the result of a simple operating point simulation. [example.zip](https://github.com/user-attachments/files/23528126/example.zip) The file is less than a Megabyte in...