sid8606
sid8606
@RealLucy and @TheRealMDoerr please review this PR.
@TheRealMDoerr I have tested with and without **SuperwordUseVX** enabled, assembler instructions review is being done by @offamitkumar. Thanks.
@TheRealMDoerr and @RealLucy Just for my understanding why GPR and FPR doesn't get affected in intrinsic code as they are also allocated outside of register allocator? why only vector registers...
Still working on addressing intrinsic vector register clobbering. Commenting to keep PR Open.
Commenting to keep PR Open.
Keeping it open.