7mile

建议：在 ReadMe 中添加 WSL 中的使用方法

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由于证书缺失，开启 SideCar 后 WSL2 中的 HTTPS 连接都会变为不受信状态，导致例如 git 无法连接到 remote 做任何操作。(WSL1不太确定会不会有这个症状) 解决方法很直接，把证书导入到 WSL 即可，但稍微需要一些[繁琐的操作](https://github.com/microsoft/WSL/issues/3161) 也就是 * 在 `DevSideCar` 的 `安装根证书` 弹出的证书属性窗口中导出证书（详细信息选项卡 -> 复制到文件） * 导出时选择 Base64 那个格式（第二项） * 将导出的证书(.cer后缀)复制到 WSL...

This PR adds OpenCL C language case to the enum `mlir::cir::SourceLanguage`, and maps `opts.OpenCL && !opts.OpenCLCPlusPlus` to it.

[CIR][CodeGen][LowerToLLVM] Emit OpenCL version metadata for SPIR-V target

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Similar to #767, this PR emit the module level OpenCL version metadata following the OG CodeGen skeleton. We use a full qualified `cir.cl.version` attribute on the module op to store...

This PR remove the header `CIR/CodeGen/CallingConv.h` and migrates all `::cir::CallingConv` stuff to `::mlir::cir::CallingConv` in `CIRGenTypes` and `CIRGenFunctionInfo`. In TargetLowering library, LowerTypes and LowerFunctionInfo basically have the same clangCallConvToLLVMCallConv stuff. The...

[CIR][LowerToLLVM][NFC] Add data layout verification of alloca as

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There are two sources for the target allocation address space: one from `TargetCIRGenInfo::getCIRAllocaAddressSpace()` and another from `targetDataLayout.getAllocaMemorySpace()`. Since both are provided by the specific target, they should be consistent. This...

[CIR][TargetLowering][NFC] Refactor LowerModule to a unified global state

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We expect the `LowerModule` to be available most of the time once `CIRGen` is complete, providing various support for lowering passes, especially target-specific information. To maintain a consistent state along...

Teach op parsers to use enum keyword parsing helpers

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Similar to LLVM dialect, we have enum keyword parsing helpers like `parseOptionalCIRKeyword` and `parseCIRKeyword`. We should reuse them to implement existing enum parsing logic, e.g. function visibility and switch case...

This is the overview issue for the GSoC project [Compile GPU kernels using ClangIR](https://discourse.llvm.org/t/clangir-compile-gpu-kernels-using-clangir/76984). Participant: @seven-mile Mentors: @jopperm @Naghasan @bcardosolopes For timeline, see the edit history of this comment. ---...

Add a test for arrays of 3-component extended vectors

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Original CodeGen treat vec3 as vec4 to get aligned memory access. It would be valuable to document as a testcase how these accesses look like in CIR and LLVM. _Originally...

Single-operand vector shuffling

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Mentioned in #613 . Some times we need to do single-operand vector shuffling. LLVM uses the form `shuffle(v, undef / poison, mask)`, while CIR currently uses `shuffle(v, v, mask)` as...