Igor Zhirkov

Results 23 comments of Igor Zhirkov

The constraints LGTM. Question: for the disassembler, will the non-sensical variants like `ret r9, somelabel` be displayed? It is encode-able, but in any case either the register or the label...

It is statically impossible to distinguish between emitted far returns and near returns. We know which one we want during codegen. From VM's perspective, there is a single type of...

If this is a problem, we may allow to assemble `ret r9, somelabel`, but emit a warning. Later we may introduce some CLI option like "allow-extended-instruction-set" to be able to...

I confirm that after redesign `nop` should have no operands. ATM three distinct instructions (nop, spadd, spdec) are having the same concrete (marked "legacy") mnemonic: see [here](https://matter-labs.github.io/eravm-spec/spec.html#SpAddDefinition). [The type `asm_instruction`](https://matter-labs.github.io/eravm-spec/spec.html#asm_instruction)...

The ideal behavior of disassembler w.r.t. the "low-level" version of nop (which implements the abstract `nop`, `incsp`, `decsp`) would be as follows: - `nop` without operands -> display `nop` -...

0. Note: this is for VM 1.5, not 1.6. 1.6 will come in more distant future. >OpContextSetErgsPerPubdataByte was removed in 1.5.0 - should it be completely removed from the MC...

In this case 1. For printing, be maximally explicit, include all modifiers that make sense. Therefore, ldm.h for printing. 2. For parsing, accept `ldm.h` but not `ldm`.

I am making a summary of concrete syntax ATM will include everything there @hedgar2017

Let's do `.f` for first. I will update it in spec tonight. CC @hedgar2017

Yes, in the isa redesign proposal, but i can make a separate summary table in spec for convenience -- been thinking about it.