Robert P. Cope
Robert P. Cope
Oops, looks like this duplicates #385
@SaladePengouin I wish I could, I don't have the ability to merge. I haven't thought about library for almost a decade now, but this sounds like a real challenge. I...
@laurenweinstein1 It may very well work, but I don't have one, I can't verify that the internals are similar enough to say definitively. You may try running the code with...
Very cool! I am going to look through these commits soon...I think I can certainly help write some tests as well.
Yeah, I'll see if I can't do it when I get home from work today. On Thu, Apr 30, 2015 at 3:00 AM, Jochen Hoenicke [email protected] wrote: > If you...
A7 -> R16 which is the entry point to an RC network the forms the output for the wave generator. C0 and C1 are hooked up to top and middle...
FX2LP D0-7 -> D0-7B on the AD9288 FX2LP B0-7 -> D0-7A on the AD9288
The CTL pins CTL0-5 have no traces running away from them. There's also no unknown vias nearby on the other side of the board, so it would appear as though...
Ok, so finally port A, other than pin 7: there's again no traces leaving any of the pins, and almost no vias in that region on the opposite side of...
Also interesting, port E0-5 are attached to some holes for a 6 pin header on the board (JP2).