Robert Norton

> I am not sure which provides more security. I'm not sure either. InitAll concluded that zero was the best value for uninitialised memory and I previously handwaved about avoiding...

I think it contains some changes to clear pointers that didn't make it into @nwf 's version so I should rebase on top of main and resubmit at some point.

I think the idea of a single Elevate bit combining what CHERIoT calls load global and load mutable is interesting. @nwf-msr 's concern about `W & !E` could probably be...

Looks like `encdec_rounding_mode` has about 60 uses but only in one of two ways: 1. in the encdec clauses for instruction decoding. I can't remember what the semantics are for...

On the last point I would like to see the conversion from rounding_mode -> bits moved into the wrapper functions (e.g. `riscv_f32Add`).

Unfortunately looks like we still need a fix for this. How about adding a width parameter to `translateAddr` and adding a `TR_Straddling` case to the `TR_Result` union? Will need to...

Yes, I'm proposing that `translateAddr` would do two translations if necessary and then the caller would have to deal with an additional case for page-straddling by performing multiple accesses and...

I haven't checked the spec but I imagine you'd want to do both of the translations first to check for faults before doing the accesses otherwise you could end up...

I can't see anywhere in the RISC-V specs. that directly addresses this case although it is permitted to emulate unaligned accesses in software implying that partial writes are possible at...

From a very small, quick study I got the best coverage just by using all integers from 0-64 (two instructions with 5-bit immediate + ybdsw with rs2=0). We need to...