Paolo Teti

I don't have LC class devices in my lab at the moment, but I'm open to review any PR. Just a remark about FLASH memory: It is a special memory...

CMSIS, that at the end is an HAL spec. and not a compiler spec, contain intrinsics just as wrapper to ACLE (see `armcc `wrappers [cmsis_armcc.h](https://github.com/ARM-software/CMSIS/blob/master/CMSIS/Include/cmsis_armcc.h) as example). So ACLE is...

@eddyp r52 is available under NDA or for approved partners only. So I prefer to wait a bit. @japaric I’ll back tomorrow at office and I’ll review your proposal. Thanks

I just released [silicon-cr4](https://github.com/paoloteti/silicon-cr4) that is a collection of workarounds for few silicon errata on Cortex-R4/R4F MCUs. I use it on my TMS570 BSP I started to port to beta/stable....

Lautherbach Trace32 is the de-facto tool **everybody** in the professional world use. Yes it is really expensive, I agree. Here an example of T32 on a Safety Critial ARM Cortex-4RF...

I have the same concern. I use to work on Rust at home (night or weekends) or as part of my company program that give me few hours per months....

Here [https://github.com/paoloteti/ti-hercules-bsp](https://github.com/paoloteti/ti-hercules-bsp) you can find a board support package + JSON for TI TMS570LS3xx (tested on TMS570LS3137) that is a BigEndian Cortex-R4F (in LockStep mode). Linaro toolchain (`armeb-none-eabi`) it is...

Cortex R4F/R5F (BE, ARM mode) is now upstream (PR 50813)

@japaric > What I'm not sure about is how to call these new targets: thumbv8m-none-eabi for the M23, but then what would the M33 be called? thumbv8m.main-none-eabi? Furthermore the M33...

Due to changes in company rules I cannot use working hours for not approved open-source projects and I don't have enougth personal spare time to hack on cortex-r devices. Probably...