occheung

## Summary This patch is to add `riscv32` target support to libfringe. ## Changes `arch/riscv32.rs`: Implemented a `riscv32` port similar to other supported targets. `mod.rs`: Point `imp` to `riscv32.rs` when...

Control Pounder through MQTT

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## Description This PR implements control of devices on Pounder through MQTT. These parameters are configurable through MQTT (topic prefix: `/settings/pdh/ch/`). ```rust pub struct PDHChannel { pub osc_frequency: f32, //...

Support CoreMgmt over DRTIO

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# ARTIQ Pull Request ## Description of Changes This PR implements the followings: 1. Flashing gateware/bootloader/firmware through `artiq_coremgmt` via `config write` similar to Zynq device. 2. Implement corresponding core-mgmt handling...

Handle EFC DRTIO Disconnection

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# ARTIQ Pull Request ## Description of Changes Prior to #2559, the DRTIO-over-EEM link between EFC and Kasli would never terminate on EFC's perspective for these reasons: - The EEM...

# ARTIQ Pull Request ## Description of Changes The PR changes one-by-one memory access from DMA and Analyzer to burst memory read/write. Availability of burst access is indicated by the...

ice40: handle PULLUP constraint

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nextpnr allows PULLUP to be configured via the `set_io` command. See [urukul-pld PR](https://git.m-labs.hk/M-Labs/urukul-pld/pulls/1#issuecomment-14618).

This adds an IOB attribute for signals and instances. In vivado, IOB attribute tells the synthesizer to place the register in the I/O block, if applicable. See the necessary conditions...

spi2: Put register to I/O block for the 7-series interface

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Ideally, this patch should only involve adding `"iob"` attributes. However, IOB inference requires a direct connection from the register to the I/O pad (there are no logic in between). -...

This PR includes frontend changes that corresponds to both [NAC3 710](https://git.m-labs.hk/M-Labs/nac3/pulls/710) and [NAC3 717](https://git.m-labs.hk/M-Labs/nac3/pulls/717). The debug binary is first generated by nac3ld, then passed to python frontend, and passed to...

## Bug Fix Chained satellites setup may fail DRTIO initialization due to satellites not generating DRTIO response in time. This is caused by satellites' blocking DRTIO initialization process. This PR...