Viktor Nagy

[avalon_qsys_sdram_16bit_errors.zip](https://github.com/SpinalHDL/VexRiscv/files/7109498/avalon_qsys_sdram_16bit_errors.zip) Here a Quartus 18.1 project project including the signaltap_avalon_sdram_16bit_error.stp signaltap records. Theoretically if you open the project with File view, you can double-click on the signaltap file, and it...

Improper build support for multi-target ARM + Risc-V project

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### Description Hi, I've created a project with multiple build configurations. The project was originally created with Risc-V target, and then I've added a build configuration with ARM (Cortex-M). The...

Hi, I'm interested in the ARM Cortex-M alternatives, also bare metal, without Linux. (I'm currently using VexRiscv.) I would like to check this core - or the single issue pipeline...

Hi, I have a Khadas Edge-V with the TS050 MIPI Display. The TS050 Display works fine with Android-10 (Qt), using this Khadas provided Android Image: `edge-android-10-v230524.img` I did not find...