nicolast0604
nicolast0604
python3 eval_image.py --proto mobilenet_deploy.prototxt --model mobilenet.caffemodel --image ./cat.jpg Traceback (most recent call last): File "eval_image.py", line 64, in eval() File "eval_image.py", line 36, in eval im = im[:, off:off +...
python3 micc_evaluation.py --template template.obj --template_lms landmark_ids.pkl ganfit_plus ganfit_reocnstruction /home/nicolast0604/GANFit/env/lib/python3.6/site-packages/menpo/image/base.py:25: UserWarning: Falling back to scipy interpolation for affine warps warn("Falling back to scipy interpolation for affine warps") ID: 1 Traceback (most...
04/XiangShan/difftest/src/test/csrc/difftest/goldenmem.cpp /home/nicolast0604/XiangShan/difftest/src/test/csrc/difftest/difftest.cpp Killed %Error: Command Failed /tools/verilator/4.104/bin/verilator_bin --cc --exe --top-module SimTop \+define\+VERILATOR\=1 \+define\+PRINTF_COND\=1 \+define\+RANDOMIZE_REG_INIT \+define\+RANDOMIZE_MEM_INIT \+define\+RANDOMIZE_GARBAGE_ASSIGN \+define\+RANDOMIZE_DELAY\=0 -Wno-STMTDLY -Wno-WIDTH -I/home/nicolast0604/XiangShan/build --x-assign unique -O3 -CFLAGS -std\=c\+\+11\ -static\ -Wall\ -I/home/nicolast0604/XiangShan/difftest/src/test/csrc\ -I/home/nicolast0604/XiangShan/difftest/src/test/csrc/common\ -I/home/nicolast0604/XiangShan/difftest/src/test/csrc/difftest\...
### Background Work - [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard) - [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues) - [X] Yes, I searched the [documentation](https://chipyard.readthedocs.io/) ### Chipyard Version and Hash...
Hi I noticed that there are TL to AXI and AXI to TL chisel module in rocket-chip. Since I neee it for another project, is there any suggestions to convert...
sbt:programming-scala-3rd-ed-code-examples> run hello world [info] compiling 136 Scala sources and 4 Java sources to D:\ScalaProject\programming-scala-book-code-examples\target\scala-3.1.2\classes ... [error] -- Error: D:\ScalaProject\programming-scala-book-code-examples\src\main\scala\progscala3\typesystem\bounds\list\AbbrevList.scala:36:17 [error] 35 |@targetName("AbbrevListCons") [error] 36 |final case class ::[B](private var...
**Describe the bug** A clear and concise description of what the bug is. /home/user/OpenTimer/ot/shell/prompt.hpp: In constructor ‘prompt::Prompt::Prompt(const string&, const string&, const std::filesystem::path&, FILE*, std::ostream&, std::ostream&)’: /home/user/OpenTimer/ot/shell/prompt.hpp:622:17: error: ‘::fileno’ has not...
**Describe the bug** A clear and concise description of what the bug is. /usr/bin/c++ -I/home/nicolast0604/OpenTimer -Wall -O2 -std=c++1z -o CMakeFiles/OpenTimer.dir/ot/unit/unit.cpp.o -c /home/nicolast0604/OpenTimer/ot/unit/unit.cpp In file included from /home/nicolast0604/OpenTimer/ot/unit/unit.hpp:4:0, from /home/nicolast0604/OpenTimer/ot/unit/unit.cpp:1: /home/nicolast0604/OpenTimer/ot/headerdef.hpp:42:10:...
/.././fixincludes/fixincl.c ../.././fixincludes/fixincl.c:29:10: fatal error: sys/wait.h: No such file or directory 29 | #include | ^~~~~~~~~~~~ compilation terminated. make[2]: *** [Makefile:76: fixincl.o] Error 1 make[2]: Leaving directory '/home/nicol/f32c-riscv-gnu-toolchain/gnu/gcc/host-x86_64-pc-msys2/fixincludes' make[1]: *** [Makefile:3643:...
At global scope: cc1plus: warning: unrecognized command line option ‘-Wno-parentheses-equality’ VTestHarness.mk:69: recipe for target 'SimDTM.o' failed make[1]: *** [SimDTM.o] Error 1 make[1]: Leaving directory '/root/fpga-zynq/rocket-chip/emulator/generated-src/rocketchip.DanaEmulatorConfig' Makefrag-verilator:65: recipe for target 'emulator-rocketchip-DanaEmulatorConfig'...