Rick Altherr

I'm seeing incorrect mapping with macOS Terminal and the default backend. For example, Alt(Left) appears to be an escape code of Key(Esc) Char('b'). When I get some time, I'll dig...

I've been building up x509-related tooling related to secure boot on a `no_std`, non-`alloc` embedded platform. I've been using x509-cert in some of those tools (https://github.com/oxidecomputer/pki-playground/ for generating test certificate...

For bootleby, only parsing is needed. For another part of the stack, I'll need both parsing and generation. I'll also want to use a hardware accelerator for RSA so having...

I only have 2x Gotek SFRKC30.AT4.35 so I've only tested with the Artery AT32F435. I was pretty careful to choose an implementation that avoids expensive math. There's one uint32_t multiply...

I'll admit that I'm not particularly strong on PLL design either. I included a link to https://www.dsprelated.com/showarticle/967.php in the comment with the parameters as I referred to that site often...

This NCO-PLL scheme was the only one that could handle the Centurion's extreme write precomp. I found no difference in results between 358kHz and 715kHz though only 715kHz was tried...

Someone just pointed out a slight numerical accuracy problem in the phase_integral. I need to move the divide by 256 down to the phase_step calculation. As is, small errors aren't...

Huh. Is gw applying any precomp? My tool adds additional precomp. On Sun, Jan 21, 2024, 3:53 AM Keir Fraser ***@***.***> wrote: > Interesting, having a play with your conversion...

I believe you are right. I'm starting to play with even lower bandwidth versions to see if 400ns can be tolerated.

I was thinking along the same lines. I started to work through the formulas again and remembered that f_n (loop natural frequency) determines how far the PLL will "pull in"...