Mark Giraud

[WIP] feature: Support for multiple PKI infrastructures

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This PR adds support for multiple PKI infrastructures. In OPC UA a PKI infrastructure corresponds to a CertificateGroup. A CertificateGroup has an issuer authority that issues certificates. This PR adds...

Hi, are there any plans on providing an alternative API where the data is not Borrowed by the goblin objects? The current api is problematic, when i want to for...

Why do Observers need to be serializable?

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Hi, I'm currently implementing some custom components and am currently stuck on implementing an observer. Why does an Observer need to be serializable, and what are the consequences of serializing...

feat: Use RPITIT instead of Box<dyn ...>

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Just a small PR to replace Box with RPITIT, since it is now stable. I believe this is what your todo in the trait was for?

Pratt parser only implemented for tuples A..Z

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I really appreciate the pratt parser feature. However, it is currently limited in the number of operators you can implement with it, since `impl_pratt_for_tuple!(A_ B_ C_ D_ E_ F_ G_...

Inconsistent sizes for FPUDataPointer

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The x86 specification specifies the FPUDataPointer register as either size 4 or size 8, depending on whether we use the 32 bit or 64 bit spec. See here: https://github.com/NationalSecurityAgency/ghidra/blob/2eb39242f9c2c37df796c66b2830f9aa48bfb034/Ghidra/Processors/x86/data/languages/ia.sinc#L86 Later...

x86: Incorrect LEAVE instruction?

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Hi, I stumbled across an (imo) incorrect definition of the `LEAVE` instruction for x86: https://github.com/NationalSecurityAgency/ghidra/blob/7148590e5c4d917ea4b0add3507c540a54b771d4/Ghidra/Processors/x86/data/languages/ia.sinc#L3332 The intel manual specifies: ``` IF StackAddressSize = 32 THEN ESP := EBP; ELSE IF...

movabs incorrect?

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Hi, im currently writing a jit compiler and need to load a 64 bit immediate value into a register. The only way to do this in one instruction afaik is...