renesas-michael-thomas
renesas-michael-thomas
I agree that since we only support ECIES-P256 and RSA-OAEP 2K/3K, AES 128 is sufficient. However, if MCUboot plans to support EC-P384 then we would have to support AES 256...
@BogdanTheGeek, thank you for pointing this out and suggesting the improvement. There is a time delay associated with re-enabling the TRNG circuit so disabling it after each read would have...
> @michaelthomasj Its been quite a while since I looked at this, but from my understanding, the TRNG is started on every Read anyway, and the datasheets seemed to indicate...
@BogdanTheGeek , please take a look at this issue https://github.com/renesas/fsp/pull/328 Similar to yours; that update is more reasonable and it will be in FSP 5.5 scheduled for August. Please close...
@kenvinh , this will be in the FSP 5.5 release scheduled for August.
Hi Henrik, Thank you for notifying us of this issue. I'll look into it and get back to you with a workaround if any and an estimate for a fix....
Hi Henrik, We've looked at the issue and it seems that the NetX spec is not in sync with the NetX implementation. The spec states that all data should be...
@athoelke , when do you plant/expect to get this merged ?
@dozen , Thank you for pointing out this issue. The code has been updated and will be available in our next release scheduled for the end of this month. -Michael
This is being internally tracked using FSPRA-1984