Maximilian Kirschner

Results 4 comments of Maximilian Kirschner

I'm not quite sure, if this is what I am looking for. My tcl sript doesn't generate Verilog Code, it adds an IP to the Vivado project: ```tcl set ipName...

I need some advice on how to debug this further. How can I find the part where the execution gets stuck?

It seems to be the combination of ONNX and CUDA. ONNX frontend with CPU works. TF frontend and CUDA works too. Could be related to #17376. @ScottTodd Can you tell...

I ran the model with --trace_execution. It seems like it gets stuck on dealloca of the cuda Device. The trace is attached. [onnx_cuda_trace.log](https://github.com/user-attachments/files/15801470/onnx_cuda_trace.log)