Maxim Blinov
Maxim Blinov
Hi all, I've been interested in running some tests on the SweRVolf, and have been succesfully programming it within the RAM region (0x00000000-0x07FFFFFF) and the DCCM region (0xF0040000-0xF004FFFF). However, as...
This concerns the SLLI encoding. From the spec, the rv32i SLLI instruction is encoded as follows:  So, the leftmost field has 7 bits of opcode space, and then theres...
Hi all, I've been asked internally to pick up the work done by Mohammed in a [previous MR](https://github.com/llvm/llvm-test-suite/pull/49). I don't have access to Mohammed's branch, so I've copied his branch...
Hi all. This works builds directly off of our other MR waiting to be merged [here](https://github.com/llvm/llvm-test-suite/pull/72), and simply adds the `gcc-dg/vect` subfolder. Under x86_64 there are 2913 build targets, 1152...