Leon Schoorl

I've narrowed the testcase to: ```haskell {- | #if 0 >>> :{ foo bar :} baz #endif -} broken :: t broken = undefined ``` This renders as: > \#...

Ok this has nothing to do with the specific contents on `#if` block, but only with its length. If you provide cpp with: ```haskell {-# LANGUAGE CPP #-} module MyLib...

It doesn't work on (my) linux either. [Here](https://gist.github.com/leonschoorl/5b0a8285b7263d2439d19e23de769c02) is a simple testcase that fails with haddock-2.22.0 and ghc-8.6.2

I've been digging myself. The documentation for [initializePlugins] says: > ... Should be re-called if pluginModNames or pluginModNameOpts changes. .. But is seems that the pluginModNames never gets set from...

The `DynFlags` which contain the plugins are cached in the `ModSummary` of the `ParsedModule`. Unpacking them, calling `initializePlugins`, and repacking everything up, kind of works. Like this: https://github.com/leonschoorl/haddock/commit/6dffdef6cd7a1ac5a982532fd9efcdc3d840ad3b There might...

No I don't have a use case for local plugins, it's just something I stumbled upon when trying to write a test for this issue.

I've been working around this by enabling [deferred type errors](https://downloads.haskell.org/~ghc/latest/docs/html/users_guide/glasgow_exts.html#defer-type-errors) during haddock generation via cabal.project: ``` package my-package haddock-options: --optghc=-fdefer-type-errors ```

Going on the [error location](https://github.com/clash-lang/clash-compiler/blob/v1.6.4/clash-lib/src/Clash/Netlist/BlackBox.hs#L680), it seems clash encounters a primitive/blackbox which is somehow under-applied, because its "result type" is a function `Unsigned 64 -> Unsigned 64`. And it fails...

You can also try passing arguments `-fclash-debug DebugSilent` to clash, that'll enable some extra internal checks during compilation that might also help tracing things down.

The clock and reset generators (`clockGen`, `tbClockGen` and `resetGen`) are written using [verilog delays](https://github.com/clash-lang/clash-compiler/blob/f3e962be3588f2b85f07ab266ee21390c9b11fdc/clash-lib/prims/verilog/Clash_Signal_Internal.primitives.yaml#L105-L114) or [vhdl wait statements](https://github.com/clash-lang/clash-compiler/blob/f3e962be3588f2b85f07ab266ee21390c9b11fdc/clash-lib/prims/vhdl/Clash_Signal_Internal.primitives.yaml#L154). They're indented for HDL simulation, not synthesis. And won't synthesize in general.