KellenTow

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Are you trying to write to both at the same time or just one at a time?

I think the problem is that it takes all the inputs and wipes the previous data 1 sec while i get what it should be

![Screenshot (27)](https://github.com/SebLague/Digital-Logic-Sim/assets/125595067/d45e5cfd-735f-499e-b4e5-1f1776110d50) I used 2 16 bit registers but it's the same idea

add more inputs on the left

I don't think that would be possible because there would be no way to differentiate from dragging and pulling other blocks out.