JOTEGO

Thank you for the wonderful README file. It describes the project very well. I am only missing to know whether how this core compares with the original 6502 in terms...

There should be an overflow test [here](https://github.com/jotego/jt12/blob/master/hdl/mixer/jt12_fm_uprate.v#L49). Thanks to @greyrogue for pointing it out.

Negation bar wrong in DTACK_SEL signals

1

The / bar on top of DTACK_SEL signals is wrong on page 12. At the output of inverter M85, it should be /DTACK_SEL0, and then DTACK_SEL0 at the output of...

315-5195 Undriven net

2

PINS_AD_DIR on page 9 seems undriven.

315-5195: unclear when the M68K can read register data

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It looks like signal W31 will enable register writting. But it is not clear when the register data can be read by the M68K. It looks like registers 1 and...

315-5195 wrong pins ~BR/~BGACK

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pin_br_out appears as a fixed low, which would stop the M68000 forever as that is the bus request signal. The /pin_br_en doesn't go anywhere either. A similar story applies to...

RED and GREEN swapped at SEGA 315-5242 outputs?

3

We are extracting the schematics for the SEGA System 18 PCB. We've found that the way signals go to the JAMMA connector seem to have RED and GREEN swapped with...

COUNTER3 and COUNTER2 outputs are labelled as CK24/xx, which seems to suggest a clock divider. This actually seems to be a pixel counter. COUNTER2 is the LSB, COUNTER3 is the...

I suggest renaming these signals: W10 -> SCR_SEL selects the scroll pixel over the sprite one CC39 -> SPR_AREA (marks the part of the screen where sprites are allowed)

These are important signals whose driver has not been labelled RES2 RES3 CLK4