Shouyu

Hello sir, I believe there is a minor error in the code. I believe the code you write still passed by reference instead of value. Since is a array generate...

Feature: Add Threshold for almost flag

5

Instead of doing the SystemVerilog trick that I described earlier, I define one more addition registers [wbinnextpt1](https://github.com/joeldushouyu/async_fifo/blob/cast-parameter/rtl/wptr_full.v#L24), similar for rpt_empty. Thus, I believe the code could still be keep in...

Feature request: Enable token_issue feature on MT

1

Hello, I was in the process of optimizing a program that allows me to better utilize the MT sram, which I realize it is only possible through the Enabe_Token_Issue on...

Feature to detect insufficient stack size

5

Hello all, I am not sure if this is the best place to raise this issue, let me know if I should raise in other repo or not. Recently, we...

Feature to read/write register values by Core during kernel at runtime

7

Hello all, I encountered an issue while using the control packet, and after discussing @erwei-xilinx, I was told to create an issue for it to have more eyes/ideas on this....

As mentioned in this [discussion](https://github.com/Xilinx/mlir-aie/pull/2267#issuecomment-2891408779), there needs to be a better method indicating tracing on Memory Bank @jackl-xilinx

Feature Request: Add compress/decompress support on Shimtile, MemoryTile, and ComputeTile

1

Hello all, Based on the description in the [manual](https://docs.amd.com/r/en-US/am020-versal-aie-ml/Sparsity), it seem to me the device has built-in hardware support for doing compression/decompression on data that are sparse to save bottleneck...