jmio
jmio
Oh! It worked. Thank you very much(^^) I've read up on withRegisterPhy(), but I'm still not sure how it works. I want to take the internal signal (VgaCtrl.io.xxxx) out to...
It worked like magic ! I would like to know what kind of rules make it work this way. Is there any code that can help me understand it?
Thank you for your answer. I managed to learn "toIo" (^^; I'll also try Intellij IDE. I pull out the VgaCtrl.vga.ctrl.io.frameStart using "toIo", saw the following error ``` [error] HIERARCHY...
pull().toIo is handy (^^)
Hello. As it turns out, we're up and running! However, I don't know myself why it started to work. What I did was. First of all, in order to make...
Since ECP5 worked so well, I thought I'd try it on EG4S20, so I generated Briey.v from the same dev-dev version and tried it. When I tried to generate from...
Hi, Thanks for the advice on the memory read, I can just send the command directly to OpenOCD. Regarding the BRAM memory inference. Based on your advice I tried to...
This is a bit off topic, but... I've been using BrieySoc with EG4S20 (TangPrimer) and ECP5 (ICE SugarPro) for a while now, for getting a portable FPGA computer toy. I...
Hi, As for the BRAM inference part, I was successful when I did the following. I just imitated SpinalHDL1.6.0... ```` reg [7:0] _zz_ramsymbol_read; reg [7:0] _zz_ramsymbol_read_1; reg [7:0] _zz_ramsymbol_read_2; reg...
>Yes, SaxonSoc could be used for small baremetal SoC. but most of its usage was for big SoC. >I would say if you want to go the SaxonSoc way, start...